SICP Exercise 3.29 or-gate in terms of and-gates and inverters

Exercise 3.29.  Another way to construct an or-gate is as a compound digital logic device, built from and-gates and inverters. Define a procedure or-gate that accomplishes this. What is the delay time of the or-gate in terms of and-gate-delay and inverter-delay?

SOLUTION

The code is here.

Note: I made an enhancement to all the function procedures such as and-gate, or-gate etc. to call the action procedure once as soon as the gate is constructed. This way we ensure that the output of the gate is correct right from the beginning.

 (OR A B) = (NOT (AND (NOT A) (NOT B)))

 Delay time of the compound-or-gate = (3 * inverter-delay) + (and-gate-delay)

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